1. Field of the Invention
The present invention relates to a semiconductor circuit having a plurality of thin-film transistors (TFTs) and a manufacturing method thereof. The semiconductor circuit that is manufactured according to the invention is formed on either an insulating substrate such as glass or a semiconductor substrate such as single crystal silicon. In particular, the present invention is effectively applied to a semiconductor circuit, such as a monolithic active matrix circuit (used in, for instance, a liquid crystal display), having a matrix circuit that is required to have a small off-current with a small variation and peripheral circuits for driving it which are required to operate at high speed and to have a small-variation on-current.
2. Description of the Prior Art
In recent years, various studies have been made of insulated-gate semiconductor devices having a thin-film active layer (also called an active region) on an insulating substrate. In particular, thin-film insulated gate transistors, i.e., thin-film transistors (TFTs), have been studied eagerly. The TFTs, which are formed on a transparent, insulating substrate, are intended to be used for controlling individual pixels in a display device having a matrix structure such as a liquid crystal display. The TFTs are classified into an amorphous silicon TFT, a crystalline silicon TFT, etc. depending on a semiconductor material used and its crystal state.
In general, having a small field-effect mobility, amorphous semiconductors cannot be used for a TFT that is required to operate at high speed. Therefore, to manufacture circuits having higher performance, crystalline silicon TFTs have been studied and developed recently. As methods for obtaining a crystalline silicon film, there are known methods in which amorphous silicon is thermally annealed for a long time at a temperature of about 600xc2x0 C. or higher, and an optical annealing method in which amorphous silicon is illuminated with strong light such as laser light.
Having a larger field-effect mobility than amorphous semiconductors, crystalline semiconductors can operate at higher speed. Since crystalline silicon can provide not only an NMOS TFT but also a PMOS TFT in a similar manner, a CMOS circuit can be formed by using crystalline silicon. For example, among active matrix type liquid crystal display devices, there is known one having a monolithic structure (i.e., a monolithic active matrix circuit) in which peripheral circuits (drivers, etc.) are also constituted of CMOS crystalline TFTs.
FIG. 1 is a block diagram showing a monolithic active matrix that is used in a general liquid crystal display. A source driver (column driver) and a gate driver (row driver) are provided as peripheral driver circuits. A large number of pixel circuits each constituted of a switching transistor and a capacitor are formed in an active matrix circuit area (pixel area). The pixel transistors of the matrix circuit are connected to each of the peripheral driver circuits via source lines or gate lines having the same number of columns or rows. TFTs used in the peripheral circuits, particularly peripheral logic circuits such as a shift register, are required to operate at high speed. Therefore, those TFTs are required to allow passage of a large current with a small variation in a selected state (on-current).
On the other hand, to assure a long-term holding of charge in the capacitor, TFTs used in the pixel circuit are required to have a sufficiently small leak current (off-current) with a small variation in a non-selected state, i.e., while a reverse-bias voltage is applied to the gate electrode. Specifically, the off-current should be smaller than 1 pA, and the variation should be less than 10%. On the other hand, the on-current need not be so large.
Although the above characteristics are physically contradictory, it is required that TFTs having such characteristics be formed on the same substrate at the same time, which means that all the TFTs should have a large on-current and a small off-current both with a small variation. It is easily understood that it is technically very difficult to satisfy such requirements.
For example, it is known that crystallizing an amorphous silicon film by optical annealing such as laser annealing is effective for obtaining a TFT having a large on-current (i.e., a large field-effect mobility). However, it is empirically known that it is impossible to attain both of a large field-effect mobility and a small off-current variation at the same time.
Also known is a method of crystallizing an amorphous silicon film by thermal annealing. Although this method can reduce an off-current variation, it cannot provide a large field-effect mobility. The present invention is to solve such a difficult problem.
The present inventors have found that it becomes possible to proceed crystallization more easily and provide better crystallinity than in the conventional methods of using thermal annealing or optical annealing by bringing a very small amount of an element of Ni, Pt, Pd, Cu, Ag, Fe, or the like, or its compound substantially in close contact with the surface of an amorphous silicon film and then performing thermal annealing or optical annealing (laser annealing, rapid thermal annealing (RTA), or the like). For example, when the thermal annealing is employed, the crystallization time can be shortened and the crystallization temperature can be lowered from the conventional cases.
It has been confirmed that the above advantages are obtained because Ni, Pt, Pd, Cu, Ag, Fe, or the like serves as a catalyst element for accelerating crystallization of an amorphous silicon film. More specifically, the above catalyst elements form a crystalline silicide with amorphous silicon at a crystallization energy lower than that of amorphous silicon. Then, after the catalyst element in the silicide moves to the location of amorphous silicon ahead, silicon enters the site of the silicide which was occupied by the catalyst element, thus forming crystalline silicon. As the catalyst element moves through amorphous silicon, a crystallized region is formed.
Thus, it has been confirmed that the crystallization of an amorphous silicon film utilizing a catalyst element proceeds in two steps that respectively correspond to the following modes:
(1) The mode in which crystallization that occurs at a region where a catalyst element is introduced. Although it is not appropriate to strictly define the crystallization direction, it may be said that crystal growth proceeds perpendicularly to a substrate.
(2) The mode in which a crystal-grown region expands as catalyst element moves from the region where it was introduced to a region where it was not, so that crystal growth proceeds parallel with the substrate.
In particular, as for the crystal growth mode (2), growth of columnar crystals parallel to a substrate has been confirmed by observations using a TEM (transmission electron microscope). In the following description, the crystal growth mode (1) and a resulting crystallized region are called vertical growth and a vertical growth region, and the crystal growth mode (2) and a resulting crystallized region are called lateral growth and a lateral growth region.
For example, if a thin coating of a catalyst element, or its compound or the like is formed on an amorphous silicon film by a certain means so as to be substantially in close contact with the latter and then thermal annealing is performed, the coated portion is initially crystallized mainly by the vertical growth and thereafter a region surrounding that portion is crystallized by the horizonal growth.
The crystallinity can be improved by performing proper optical annealing after the above crystal growth by thermal annealing. The main effects of the optical annealing are to increase the field-effect mobility and reduce the threshold voltage.
The vertical growth and the lateral growth have a difference in the degree of crystal orientation. In general, the vertical growth does not provide so high a degree of crystal orientation in which orientation in the (111) plane with respect to the substrate surface is dominant to a small extent. In contrast, remarkable orientation is found in the lateral growth. For example, where a silicon film is coated with a silicon dioxide film or a silicon nitride film and then crystallized by thermal annealing, orientation in the (111) plane mainly occurs. Specifically; in an X-ray diffraction measurement, the ratio of a reflection intensity of the (111) plane to the sum of reflection intensities of the (111), (220) and (311) planes amounts to more than 80%.
The above tendency becomes more remarkable if optical annealing is performed after the crystallization by thermal annealing; the above ratio increases to more than 90%.
Where a silicon film surface is crystallized by thermal annealing without coating it, orientation in the (220) plane is also enhanced, so that reflection intensities of both (111) and (220) planes become larger than 90%.
To effect the lateral growth, a catalyst element needs to be introduced selectively. This is usually done such that a hole for introduction is opened by photolithography in a coating of a material whose main component is silicon dioxide, silicon nitride or silicon oxynitride which coating is formed on an amorphous silicon film and then a thin film, a cluster, or the like of a catalyst element or its compound is formed by sputtering, CVD, spin coating, or some other method. The studies of the present inventors have revealed that if the hole diameter is less than 7 xcexcm, a crystal growth defect occurs at a very high probability.
This is disadvantageous for use in a high-integration area such as peripheral logic circuits. In particular, such a manufacturing method is not applicable to the cases of design rules of 5 xcexcm or less. On the other hand, the lateral growth does not cause any problem in an active matrix circuit where a sufficient distance is secured between adjacent TFTs.
However, it has become apparent that the lateral growth need not be employed for peripheral logic circuits. The investigations of the present inventors have revealed that while the lateral growth and the vertical growth do not cause a large difference in field-effect mobility, however, it can be increased by up to about two times by an optical annealing subsequent to thermal annealing. A typical field-effect mobility is 50 to 80 cm2/Vs when only thermal annealing is performed. By additionally performing, for instance, laser annealing, an increased value of 100 to 200 cm2/Vs was obtained. Either value is sufficiently large for TFTs in peripheral logic circuits.
It is not necessary to change the conditions of the above optical annealing for a vertical growth region and a lateral growth region. This is advantageous in terms of mass productivity because optical annealing for a single substrate can be performed under substantially the same conditions (except unintentional variations of conditions).
On the other hand, the vertical growth and the lateral growth cause large differences in the magnitude of the off-current and its variation. That is, while both of the off-current and its variation are small with the lateral growth, both of them tend to be large with the vertical growth.
The present invention is characterized in that by utilizing the above features of the vertical growth and the lateral growth, crystallization is effected by the lateral growth for TFTs of an active matrix circuit and by the vertical growth for TFTs of peripheral logic circuits. The peripheral logic circuits mean those included in a source driver and a gate driver. In such circuits as analog switches, either the vertical growth or the lateral growth may be employed.
The present invention is characterized in that a region crystallized by the lateral growth is used for TFTs of an active matrix circuit. In this case, there are several variations for the arrangement of TFTs as shown in FIG. 4. In FIG. 4, reference numeral 401 denotes a region where a catalyst element has been introduced, i.e., a region that has been crystallized by the vertical growth. A region 402 that has been crystallized by the lateral growth develops around the region 401.
As shown in FIG. 4, if the catalyst-added region 401 has a rectangular shape, the lateral growth region 402 assumes an elliptical shape. In one case (in the case of TFT1), a gate electrode 404 is formed generally parallel with the region 401 and crystal growth is effected in the direction from a drain 405 to a source 403, or the direction opposite thereto.
In another case (in the case of TFT2 in FIG. 4), a gate electrode 407 is formed generally perpendicularly to the region 401 and portions of a source 406 and a drain 408 are crystallized approximately at the same time. It has been confirmed that the above two cases do not cause much difference.
In an active matrix circuit, a catalyst element may be added linearly so as to be generally parallel with source lines or gate lines. FIGS. 5(A) and 5(B) show examples where catalyst-added regions 501 and 506 are parallel with gate lines 502 and 507, respectively. FIG. 5(A) shows a case corresponding to TFT2 in FIG. 4 in which case a catalyst is added generally perpendicularly to gate electrodes of TFTs 503 to 505. FIG. 5(B) shows a case corresponding to TFT1 in FIG. 4 in which case a catalyst element is added generally parallel with gate electrodes of TFTs 508 to 510. Catalyst-added regions may be provided generally parallel with source lines in a similar manner.
As described above, orientation in the (111) plane and the (220) plane is remarkable in a lateral growth region, and is not so remarkable in a vertical growth region. Therefore, in the present invention, a crystalline silicon semiconductor (lateral growth regions) for such elements as TFTs of an active matrix circuit, resistors and capacitors is given orientation in the (111) or (220) plane, and a crystalline silicon semiconductor for peripheral circuits is given a lower degree of orientation than that for the active matrix circuit.
If the thermal annealing for crystallization is performed at a temperature higher than the crystallization temperature of an amorphous silicon thin film, there can be obtained crystallinity equivalent to that obtained when laser annealing is also performed. The crystallization temperature of an amorphous silicon thin film is approximately in the range of 580 to 620xc2x0 C. although it depends on the film deposition method and conditions. By performing a heat treatment at a temperature higher than this temperature (as high a temperature as possible is preferred as long as it is allowable), a crystalline silicon film having superior crystallinity can be obtained. It is preferred that the upper limit of the temperature of this heat treatment be set at about 1,100xc2x0 C. To employ a heat treatment at such a high temperature, it is necessary to use a quartz substrate or a glass substrate capable of withstanding such a high temperature.
In the present invention, the vertical crystal growth utilizing a catalyst element is performed to obtain a crystalline silicon semiconductor for peripheral logic circuits having a high integration degree. As a result, TFTs having a large field-effect mobility can be obtained irrespective of the integration degree. On the other hand, the lateral crystal growth utilizing a catalyst element is performed for an active matrix circuit. As a result, TFTs having a small off-current with a small variation can be obtained. In particular, if the heat treatment for crystallization is performed at a temperature higher than the crystallization temperature of an amorphous silicon thin film, superior crystallinity can be obtained.